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Q1: Consider the following MIPS assembly language code:Draw the pipeline diagram (complete the table below) showing the timing of thecode instructions on the 5-stage pipeline (IF, ID, EX, MEM, WB). The pipelinesupports forwarding and pipeline stall. Draw an arrow showing forwardingbetween the stage that provides the data and the stage that receives the data.Show all stall cycles (draw an X in the box to represent a stall cycle). Determinethe number of clock cycles to execute this code.11: ORI $s

Answered: D Question 11 Assume that you are working with the five-stage pipeline shown in the diagram. Stage 1 Instruction Fetch Unit Stage 2 Instruction Decode Unit… | bartleby

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