The i.MX 6 series of applications processors, part of the EdgeVerse™ edge computing platform, offers a feature- and performance-scalable multicore platform that includes single-, dual- and quad-core families based on the Cortex architecture—including Cortex-A9, combined Cortex-A9 + Cortex-M4 and Cortex-A7 based solutions.

i.MX 6系列应用处理器是一个功能和性能可扩展的多核平台，包括基于Arm Cortex架构的单核、双核和四核系列产品。 i.MX 6系列成为开发一系列基于单一硬件设计的终端产品的理想平台。

The i.MX 6 series of applications processors combines scalable platforms with broad levels of integration and power-efficient processing capabilities particularly suited to multimedia applications. The i.MX 6Solo processor features: The i.MX 6Solo is supported by companion power management ICs (PMIC) MMPF0100, MMPF0200 and PF3001.

I.MX6是一款功能非常强大的处理器,具有单核简化，单核，双核简化，双核，四核，并且兼容性非常好，详细的资料可以登陆飞思卡尔官方网站去查询。 对于用户来说，只需开发一款，就相当于开发了一个系列，兼容低端，中端，高端的设计需求。 并且这款CPU的开发资料非常齐全，国内的明远智睿，在I.MX6开发上，提供了全套的中文文档，并且提供全套的源码，原理图和 PCB 图，对于想开发I.MX6的客户来说，是难得的机会。 明远智睿的I.MX6开发板，采用I.MX6核心板加底板 …

i.MX 6系列的应用处理器将可扩展平台与广泛的集成和高能效处理功能相结合，尤其适合多媒体应用。 i.MX6 Quad处理器的特性包括： 商业支持和工程服务. 快速参考恩智浦 文档类别. i.MX 6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Linux BSP Documentation. Patch Release Notes[IMX6LXPATCHRN] PDF Nov 3, 2014 版本更新 L3.0.101_4.1.1.

i.MX 6UltraLite是一个高性能、超高效处理器系列，配备Arm Cortex-A7单核的恩智浦先进实施，运行速度高达528 MHz。 i.MX 6UltraLite应用处理器包括一个集成的电源管理模块，降低了外接电源的复杂性，并简化了上电时序。

The i.MX 6SoloX processor utilizes both Arm Cortex-A9 and Cortex-M4 cores to enable secure, connected homes and vehicles within the IoT.

Single- and dual-core designs provide cost-effective performance scalability while the flagship i.MX 6Quad processor provides more performance at lower power for the most demanding applications with constrained power budgets. 2-channel, 32-bit LPDDR2 support.

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NXP Semiconductor's i.MX6 series unleashes the industry's first truly scalable multicore platform that includes single-, dual- and quad-core families based on the ARM® Cortex™-A9 architecture. Together with a robust ecosystem, i.MX6 series provides the ideal platform to develop a portfolio of end devices based on a single hardware design.