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以下白皮书介绍了英飞凌的综合四部分流程，该流程用于成功鉴定 CoolGaN™ 栅极注入晶体管 (GIT) HEMT 600 V 技术及其衍生产品。 内文描述了关键故障机制，并提供了确保在各种应用中安全可靠运行的

Reliability tests on 600V-rated GaN-based normally-off hybrid-drain-embedded Gate Injection Transistor (HD-GIT) are performed. High-temperature reverse-bias test on HD-GIT reveals that the lifetime is dependent on the leakage current before the reliability test. Acceleration factors for the temperature and reverse bias voltage are extracted.

Abstract: Reliability of a GaN-based Hybrid-Drain-embedded Gate Injection Transistor (HD-GIT) under continuous switching operation is investigated to extract the lifetime under a practical switching application. Switching lifetimes are deduced by varying ambient temperature, switching voltage and switching current to obtain their corresponding ...

2015年6月15日 · The p-GaN region is electrically connected to the drain electrode so that this is named as Hybrid Drain-embedded GIT (HD-GIT). The fabricated HD-GITs are free from current collapse at 850 V of the drain voltage or over, which significantly helps to achieve stable system operations and is very promising for future switching power supply ...

2023年2月27日 · 松下混合漏极栅极注入晶体管（HD-GIT）是常关型GaN-on-silicon晶体管（图1）。 它们基于HEMT原理，使用在AlGaN-GaN异质结处形成的高度移动的2D 电子 气体作为导电层。 晶体管的有源部分在顶侧完成，具有（欧姆）漏极和源极接触，凹陷的p-GaN栅极（欧姆接触）和连接到漏极的p-GaN“栅极”结构。 出于成本原因，晶体管通过MOCVD工艺生长在6英寸硅晶片的顶部。 为了减小由Si和GaN的不匹配晶格引起的拉应力，限制垂直漏极 - 基板泄漏电流并防 …

2023年4月10日 · 执行了 git rev-parse --show-toplevel 发现也是在当前目录下 The text was updated successfully, but these errors were encountered: All reactions

2017年12月1日 · 混合漏极嵌入式栅极注入晶体管(HD-GIT)是一种较成熟的gan基功率晶体管结构，它解决了电流崩溃和负栅极阈值电压的问题。 本文通过实验研究了一种基于hd - git的GaN功率晶体管的电学特性。

GaN HD-GIT free from current collapse passes all of the reliability test standards by JEDEC. HD-GIT exhibits long lifetime under switching reliability tests called as D-HTOL with inductive load. Acceleration factors for the D-HTOL by drain current/voltage are extracted for the estimation of lifetime in practical switching system.

2023年5月5日 · Infineon’s CoolGaN GIT technology features a unique combination of a robust gate structure, internal electrostatic discharge (ESD) protection, and excellent dynamic R DS (on) performance.