A Reliable 8T SRAM for High-Speed Searching and Logic-in …
In this article, we propose a novel 8T compute SRAM (CSRAM) for reliable and high-speed in-memory searching and compound logic-in-memory computations. Our 8T CSRAM features a …
GitHub - aieask/mdw21: Design of 6T, 8T and 10T SRAM Cells …
This workshop presents a basic overview of different SRAM Cell Designs using LTSpice and ASU's Arizona State Predictive PDK (ASAP) 14nm FinFET node, using an intuitive approach …
A FinFET-based low-power, stable 8T SRAM cell with high yield
2024年2月1日 · The Prop. 8 T SRAM cell dissipates lower leakage power compared to the SB7T and TRD9T SRAM cell because it eliminates read bitline leakage in its reading path and uses …
High speed 8T SRAM cell design with improved read stability at 180nm ...
High speed 8T SRAM cell design with improved read stability at 180nm technology Abstract: In this work a novel single-ended 8T static random access memory cell with low power …
8T-SRAM cell with Improved Read and Write Margins in 65 nm
2015年11月25日 · In this chapter, a novel 8T-SRAM cell is proposed which shows a significant improvement in write margin by at least 22 % in comparison to the standard 6T-SRAM cell at …
An 8T-SRAM for Variability Tolerance and Low-Voltage Operation …
2008年3月31日 · Abstract: An eight-transistor (8T) cell is proposed to improve variability tolerance and low-voltage operation in high-speed SRAM caches. While the cell itself can be designed …
A novel 8T SRAM cell using PFC and PPC VS-CNTFET transistor
2025年1月17日 · The performance of the 8T SRAM cell incorporating PFC and PPC transistor is investigated with Synopsys HSPICE using the Stanford CNFET model. The proposed SRAM …
A low power static noise margin enhanced reliable 8 T SRAM cell
2024年4月20日 · This paper demonstrated a one-sided schmitt-trigger-based 8 T-SRAM cell, to improve the static noise margin, mitigate the power utilization, and operate SRAM in near …
A novel 8T SRAM with improved cell density - Springer
2018年8月31日 · Low voltage and high-density SRAM memory creates new challenges such as stability and sense margin. Conventional decoupled 8T SRAM cell has improved read stability …
Realizing In-Memory Computing using Reliable Differential 8T SRAM …
2024年10月8日 · A modified differential eight transistor (8 + T) static random access memory (SRAM)-based in-memory computing (IMC) structure was presented for realizing bit-wise …